Analog VLSI arrays for morphological image processing

A two-dimensional analog VLSI array that performs basic morphological image processing operations is presented. The system uses a smart pixel approach that facilitates the parallel computation of continuous real-time outputs. Photodetectors within the array of smart pixels also allow for parallel optical inputs. The processing is performed by current-mode circuitry implemented with CMOS technology. The signal values are encoded as analog current values. The processing array uses local communication to perform the morphological operation known as dilation, and outputs the difference between the original input image and the dilation image to detect edges. The system was fabricated using a standard 2.0 μm digital CMOS process. Example output data of the fabricated circuitry are presented.